The Simple-As-Possible (SAP)-1 computer is a very basic model of a microprocessor explained by Albert Paul Malvino. The SAP-1 design contains the basic necessities for a functional Microprocessor, step by step. Its primary purpose is to develop a basic understanding of how a microprocessor works, interacts with memory and other parts of the system like input and output.
In this “Basic Computer Architecture – Microprocessors” you will learn about the following topics:
- SAP-1(Simple as Possible-1) Architecture
- Features of SAP -1 Architecture
- Program Counter, Input and MAR, RAM, Instruction Register, Controller-Sequencer, Accumulator, Adder – Subtractor, B Register, Output Register, Output Port/Binary Display
- SAP-1 Instruction Set
- PROGRAMMING SAP-1
- SAP-1 Instruction Cycle
- Fetch Cycle
- Execution Cycle
- Execution Cycle (LDA Instruction), Execution Cycle (ADD and SUB Instruction), Execution Cycle (OUT Instruction), Execution Cycle (HLT Instruction)
- Timing Diagrams
- Sap - 1 Micro program
- Microinstructions, Macro-instruction, Microprogramming, Storing the Micro-Program, Address ROM, Control Matrix, Presettable Counter, Control ROM
- Controller Implementation
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